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架构仿真

CPU Simulators

• gem5
  • A modular platform for computer-system architecture research, encompassing system-level architecture as well as processor microarchitecture.
• MARSSx86
  • A tool for cycle accurate full system simulation of the x86-64 architecture, specifically multicore implementations.
• Sniper
  • A next generation parallel, high-speed and accurate x86 simulator.
• zsim
  • A fast and scalable x86-64 multicore simulator.
• JADE (HKUST), under BSD 3-Clause License
  • Heterogeneous Multiprocessor Design Simulation Environment.
• SESC (UIUC)
  • It models a very wide set of architectures: single processors, CMPs, PIMs, and thread level speculation.
• MARSS-RISCV (Binghamton U), under MIT License
  • MARSS-RISCV (Micro-ARchitectural System Simulator - RISCV) is an open-source, cycle-level single-core full-system (Linux) micro-architectural simulator for the RISC-V ISA built on top of TinyEMU emulator developed by Fabrice Bellard and utilizes the configuration code, RISC-V CPU state, physical memory, MMU, and all the devices emulated by TinyEMU.

GPU Simulators

• GPGPU-sim
  • A detailed simulation model of a contemporary GPU (such as NVIDIA's Fermi and GT200 architectures) running CUDA and/or OpenCL workloads.
  • Includes an integrated (and validated) energy model, GPUWattch.

Chiplet Simulators

• SCUT multi-chiplet system simulator (SCUT)

Accelerator Simulators

• PARADE (UCLA), under BSD 3-Clause License
  • A cycle-accurate full-system simulation platform for accelerator-rich architectural design and exploration.
  • It extends the widely used gem5 simulator with high-level synthesis (HLS) support.
• SCALE-Sim (ARM), under MIT License
  • SCALE sim is a CNN accelerator simulator, that provides cycle-accurate timing, power/energy, memory bandwidth and trace results for a specified accelerator configuration and neural network architecture.

Accelerator Analyzers

• ALADDIN (Harvard), under Apache License 2.0
  • A pre-RTL, power-performance simulator for fixed-function accelerators.
• Lin-Analyzer (NUS), under GNU General Public License v3.0
  • A high-level performance analysis tool for FPGA-based accelerator.
• COMBA (HKUST), under GNU General Public License v3.0
  • A Model-Based Analysis Framework for High Level Synthesis on FPGAs.

DRAM Simulators

• Ramulator (CMU)
  • A Fast and Extensible DRAM Simulator, with built-in support for modeling many different DRAM technologies including DDRx, LPDDRx, GDDRx, WIOx, HBMx, and various academic proposals.
• DrSim (UT Austin)
  • A cycle-based DRAM system simulator.