存储单元 Memory Compiler¶ OpenRAM (UCSC), under BSD 3-Clause License An award winning open-source Python framework to create the layout, netlists, timing and power models, placement and routing models, and other views necessary to use SRAMs in ASIC design. AMC (Yale), under GNU General Public License v2.0 An open-source asynchronous pipelined memory compiler. Memory Subsystem¶ LiteDRAM, under BSD 2-Clause License LiteDRAM provides a small footprint and configurable DRAM core. BYOC Memory System A "Bring Your Own Core" framework for heterogeneous-ISA research. Logic in Memory¶ LiME (LLNL), under BSD 3-Clause License Logic in Memory Emulator (LiME) is a hardware/software tool specially designed for memory system evaluation and experiment.